The present invention relates to a semiconductor device constituted of an integrated circuit having a MOS transistor formed therein, and more particularly, to a method of forming a gate electrode for improving reliability of a gate insulating film of the MOS transistor.
Now, we will explain steps of manufacturing the MOS transistor which serves as a constitutional element of an integrated circuit formed on a conventional semiconductor substrate, by taking an NMOS transistor having an LDD (lightly doped drain) structure, as an example. First, an element isolating region 2 is formed on a surface region of a p-type silicon semiconductor substrate 1 by a LOCOS method or the like. A gate insulating film (SiO2) 3 is formed on an element region surrounded by the element isolating region 2. Then, boron ions are injected (channel ion injection) over an entire main surface of the semiconductor substrate 1 to control a threshold voltage (FIG. 9A). Subsequently, a polysilicon film is deposited over the entire main surface of the semiconductor substrate 1 and patterned to form a gate electrode 4 of polysilicon (PolySi) on the gate insulating film 3 in the element region. Thereafter, P (phosphorus) ions are injected in a low amount to form an n− source/drain region 5 for mitigating a high electric field (FIG. 9B).
Next, a silicon oxide film (SiO2) 6 is deposited on the semiconductor substrate 1 by a CVD (Chemical Vapor Deposition) method or the like so as to cover the gate electrode 4 (FIG. 10A). Subsequently, the silicon oxide film 6 is anisotoropically etched to form a side wall insulating film 7 on a side wall of the gate electrode 4. Thereafter, n-type impurity ions such as arsenic (As) ions are doped in a high amount to form an n+ source/drain region 8 (FIG. 10B).
As described above, in the MOS transistor, a polysilicon film doped with phosphorus, arsenic, or boron is generally used as the gate electrode. The polysilicon film is deposited by an LPCVD method at a reaction-chamber ambient temperature of about 600° C. The polysilicon film deposited under the aforementioned conditions has a film stressfilm stress of 300 MPa or more despite the presence or absence of a dopant. Such a high stress of the gate electrode is applied to a gate insulating film (in this prior art, the film may be composed of a silicon oxide film, hereinafter simply called “gate insulating film”, for the simplicity of explanation) whereby the high stress affects reliability of the gate insulating film or gate insulating film formed under the gate electrode. To explain more specifically, when the stress is applied to the gate insulating film, the bonding between silicon and oxygen constituting the gate insulating film is distorted. As a result, the bonding is tend to be easily broken, readily inducing dielectric breakdown of the gate insulating film.
When intrinsic dielectric breakdown of the insulating film takes place, the total amount Qbd of electric charge passing through the insulating film is up to about 15 C/cm2 under application of an electric field of 12 MV/cm to the insulating film, assuming that the thickness of the insulating film is about 10 nm. The total charge amount Qbd is a value on the basis of which the reliability of a transistor is determined. Therefore, the Qbd desirably has a large value. Particularly, in non-volatile storage device, such as EEPROM (Electrically Erasable Programmable Read Only memory) in which data is written into a memory cell by using a tunnel current, how many times can be programmed is restricted by the total charge amount Qbd. Therefore, it is necessary to increase the total charge amount Qbd in order to improve performance of the device.